203 lines
6.8 KiB
C
203 lines
6.8 KiB
C
/*
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* Copyright (c) 2023, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ============ ti_msp_dl_config.c =============
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* Configured MSPM0 DriverLib module definitions
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*
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* DO NOT EDIT - This file is generated for the MSPM0G350X
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* by the SysConfig tool.
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*/
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#include "ti_msp_dl_config.h"
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/*
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* ======== SYSCFG_DL_init ========
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* Perform any initialization needed before using any board APIs
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*/
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SYSCONFIG_WEAK void SYSCFG_DL_init(void)
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{
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SYSCFG_DL_initPower();
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SYSCFG_DL_GPIO_init();
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/* Module-Specific Initializations*/
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SYSCFG_DL_SYSCTL_init();
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SYSCFG_DL_I2C_1_init();
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SYSCFG_DL_UART_0_init();
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SYSCFG_DL_DMA_init();
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}
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SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
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{
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DL_GPIO_reset(GPIOA);
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DL_GPIO_reset(GPIOB);
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DL_I2C_reset(I2C_1_INST);
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DL_UART_Main_reset(UART_0_INST);
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DL_GPIO_enablePower(GPIOA);
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DL_GPIO_enablePower(GPIOB);
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DL_I2C_enablePower(I2C_1_INST);
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DL_UART_Main_enablePower(UART_0_INST);
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delay_cycles(POWER_STARTUP_DELAY);
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}
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SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
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{
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DL_GPIO_initPeripheralInputFunctionFeatures(GPIO_I2C_1_IOMUX_SDA,
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GPIO_I2C_1_IOMUX_SDA_FUNC, DL_GPIO_INVERSION_DISABLE,
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DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE,
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DL_GPIO_WAKEUP_DISABLE);
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DL_GPIO_initPeripheralInputFunctionFeatures(GPIO_I2C_1_IOMUX_SCL,
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GPIO_I2C_1_IOMUX_SCL_FUNC, DL_GPIO_INVERSION_DISABLE,
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DL_GPIO_RESISTOR_NONE, DL_GPIO_HYSTERESIS_DISABLE,
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DL_GPIO_WAKEUP_DISABLE);
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DL_GPIO_enableHiZ(GPIO_I2C_1_IOMUX_SDA);
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DL_GPIO_enableHiZ(GPIO_I2C_1_IOMUX_SCL);
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DL_GPIO_initPeripheralOutputFunction(
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GPIO_UART_0_IOMUX_TX, GPIO_UART_0_IOMUX_TX_FUNC);
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DL_GPIO_initPeripheralInputFunction(
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GPIO_UART_0_IOMUX_RX, GPIO_UART_0_IOMUX_RX_FUNC);
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DL_GPIO_initDigitalOutput(LED_PA0_IOMUX);
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DL_GPIO_clearPins(LED_PORT, LED_PA0_PIN);
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DL_GPIO_enableOutput(LED_PORT, LED_PA0_PIN);
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}
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SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
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{
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//Low Power Mode is configured to be SLEEP0
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DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);
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DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
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/* Set default configuration */
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DL_SYSCTL_disableHFXT();
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DL_SYSCTL_disableSYSPLL();
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DL_SYSCTL_setULPCLKDivider(DL_SYSCTL_ULPCLK_DIV_1);
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DL_SYSCTL_setMCLKDivider(DL_SYSCTL_MCLK_DIVIDER_DISABLE);
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}
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static const DL_I2C_ClockConfig gI2C_1ClockConfig = {
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.clockSel = DL_I2C_CLOCK_BUSCLK,
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.divideRatio = DL_I2C_CLOCK_DIVIDE_1,
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};
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SYSCONFIG_WEAK void SYSCFG_DL_I2C_1_init(void) {
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DL_I2C_setClockConfig(I2C_1_INST,
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(DL_I2C_ClockConfig *) &gI2C_1ClockConfig);
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DL_I2C_disableAnalogGlitchFilter(I2C_1_INST);
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/* Configure Controller Mode */
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DL_I2C_resetControllerTransfer(I2C_1_INST);
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/* Set frequency to 400000 Hz*/
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DL_I2C_setTimerPeriod(I2C_1_INST, 7);
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DL_I2C_setControllerTXFIFOThreshold(I2C_1_INST, DL_I2C_TX_FIFO_LEVEL_EMPTY);
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DL_I2C_setControllerRXFIFOThreshold(I2C_1_INST, DL_I2C_RX_FIFO_LEVEL_BYTES_1);
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DL_I2C_enableControllerClockStretching(I2C_1_INST);
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/* Enable module */
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DL_I2C_enableController(I2C_1_INST);
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}
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static const DL_UART_Main_ClockConfig gUART_0ClockConfig = {
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.clockSel = DL_UART_MAIN_CLOCK_BUSCLK,
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.divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_8
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};
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static const DL_UART_Main_Config gUART_0Config = {
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.mode = DL_UART_MAIN_MODE_NORMAL,
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.direction = DL_UART_MAIN_DIRECTION_TX_RX,
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.flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE,
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.parity = DL_UART_MAIN_PARITY_NONE,
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.wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS,
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.stopBits = DL_UART_MAIN_STOP_BITS_ONE
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};
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SYSCONFIG_WEAK void SYSCFG_DL_UART_0_init(void)
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{
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DL_UART_Main_setClockConfig(UART_0_INST, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig);
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DL_UART_Main_init(UART_0_INST, (DL_UART_Main_Config *) &gUART_0Config);
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/*
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* Configure baud rate by setting oversampling and baud rate divisors.
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* Target baud rate: 115200
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* Actual baud rate: 115107.91
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*/
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DL_UART_Main_setOversampling(UART_0_INST, DL_UART_OVERSAMPLING_RATE_16X);
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DL_UART_Main_setBaudRateDivisor(UART_0_INST, UART_0_IBRD_4_MHZ_115200_BAUD, UART_0_FBRD_4_MHZ_115200_BAUD);
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/* Configure DMA Transmit Event */
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DL_UART_Main_enableDMATransmitEvent(UART_0_INST);
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/* Configure FIFOs */
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DL_UART_Main_enableFIFOs(UART_0_INST);
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DL_UART_Main_setRXFIFOThreshold(UART_0_INST, DL_UART_RX_FIFO_LEVEL_ONE_ENTRY);
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DL_UART_Main_setTXFIFOThreshold(UART_0_INST, DL_UART_TX_FIFO_LEVEL_ONE_ENTRY);
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DL_UART_Main_enable(UART_0_INST);
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}
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static const DL_DMA_Config gDMA_CH0Config = {
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.transferMode = DL_DMA_SINGLE_TRANSFER_MODE,
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.extendedMode = DL_DMA_NORMAL_MODE,
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.destIncrement = DL_DMA_ADDR_UNCHANGED,
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.srcIncrement = DL_DMA_ADDR_INCREMENT,
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.destWidth = DL_DMA_WIDTH_BYTE,
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.srcWidth = DL_DMA_WIDTH_BYTE,
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.trigger = UART_0_INST_DMA_TRIGGER,
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.triggerType = DL_DMA_TRIGGER_TYPE_EXTERNAL,
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};
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SYSCONFIG_WEAK void SYSCFG_DL_DMA_CH0_init(void)
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{
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DL_DMA_initChannel(DMA, DMA_CH0_CHAN_ID , (DL_DMA_Config *) &gDMA_CH0Config);
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}
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SYSCONFIG_WEAK void SYSCFG_DL_DMA_init(void){
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SYSCFG_DL_DMA_CH0_init();
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}
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