mt6701 uart_redirect
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252
keil/startup_mspm0g350x_uvision.s
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252
keil/startup_mspm0g350x_uvision.s
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;//*****************************************************************************
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;//
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;// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/
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;//
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;// Redistribution and use in source and binary forms, with or without
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;// modification, are permitted provided that the following conditions
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;// are met:
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;//
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;// Redistributions of source code must retain the above copyright
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;// notice, this list of conditions and the following disclaimer.
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;//
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;// Redistributions in binary form must reproduce the above copyright
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;// notice, this list of conditions and the following disclaimer in the
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;// documentation and/or other materials provided with the
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;// distribution.
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;//
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;// Neither the name of Texas Instruments Incorporated nor the names of
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;// its contributors may be used to endorse or promote products derived
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;// from this software without specific prior written permission.
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;//
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;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;//
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;// MSPM0G3507 startup file
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;//
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;//****************************************************************************
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000100
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD GROUP0_IRQHandler ; 1: GROUP0 interrupt handler
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DCD GROUP1_IRQHandler ; 2: GROUP1 interrupt handler
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DCD TIMG8_IRQHandler ; 3: TIMG8 interrupt handler
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DCD UART3_IRQHandler ; 4: UART3 interrupt handler
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DCD ADC0_IRQHandler ; 5: ADC0 interrupt handler
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DCD ADC1_IRQHandler ; 6: ADC1 interrupt handler
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DCD CANFD0_IRQHandler ; 7: CANFD0 interrupt handler
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DCD DAC0_IRQHandler ; 8: DAC0 interrupt handler
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DCD 0 ; 9: Reserved
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DCD SPI0_IRQHandler ; 10: SPI0 interrupt handler
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DCD SPI1_IRQHandler ; 11: SPI1 interrupt handler
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DCD 0 ; 12: Reserved
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DCD 0 ; 13: Reserved
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DCD UART1_IRQHandler ; 14: UART1 interrupt handler
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DCD UART2_IRQHandler ; 15: UART2 interrupt handler
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DCD UART0_IRQHandler ; 16: UART0 interrupt handler
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DCD TIMG0_IRQHandler ; 17: TIMG0 interrupt handler
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DCD TIMG6_IRQHandler ; 18: TIMG6 interrupt handler
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DCD TIMA0_IRQHandler ; 19: TIMA0 interrupt handler
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DCD TIMA1_IRQHandler ; 20: TIMA1 interrupt handler
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DCD TIMG7_IRQHandler ; 21: TIMG7 interrupt handler
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DCD TIMG12_IRQHandler ; 22: TIMG12 interrupt handler
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DCD 0 ; 23: Reserved
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DCD 0 ; 24: Reserved
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DCD I2C0_IRQHandler ; 25: I2C0 interrupt handler
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DCD I2C1_IRQHandler ; 26: I2C1 interrupt handler
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DCD 0 ; 27: Reserved
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DCD 0 ; 28: Reserved
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DCD AES_IRQHandler ; 29: AES interrupt handler
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DCD 0 ; 30: Reserved
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DCD RTC_IRQHandler ; 31: RTC interrupt handler
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DCD DMA_IRQHandler ; 32: DMA interrupt handler
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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;IMPORT SystemInit
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IMPORT __main
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; SystemInit can be called here, but not necessary for MSPM0
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;LDR R0, =SystemInit
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;BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT Default_Handler [WEAK]
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EXPORT GROUP0_IRQHandler [WEAK]
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EXPORT GROUP1_IRQHandler [WEAK]
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EXPORT TIMG8_IRQHandler [WEAK]
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EXPORT UART3_IRQHandler [WEAK]
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EXPORT ADC0_IRQHandler [WEAK]
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EXPORT ADC1_IRQHandler [WEAK]
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EXPORT CANFD0_IRQHandler [WEAK]
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EXPORT DAC0_IRQHandler [WEAK]
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EXPORT SPI0_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT UART0_IRQHandler [WEAK]
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EXPORT TIMG0_IRQHandler [WEAK]
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EXPORT TIMG6_IRQHandler [WEAK]
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EXPORT TIMA0_IRQHandler [WEAK]
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EXPORT TIMA1_IRQHandler [WEAK]
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EXPORT TIMG7_IRQHandler [WEAK]
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EXPORT TIMG12_IRQHandler [WEAK]
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EXPORT I2C0_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT AES_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT DMA_IRQHandler [WEAK]
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GROUP0_IRQHandler
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GROUP1_IRQHandler
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TIMG8_IRQHandler
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UART3_IRQHandler
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ADC0_IRQHandler
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ADC1_IRQHandler
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CANFD0_IRQHandler
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DAC0_IRQHandler
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SPI0_IRQHandler
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SPI1_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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UART0_IRQHandler
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TIMG0_IRQHandler
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TIMG6_IRQHandler
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TIMA0_IRQHandler
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TIMA1_IRQHandler
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TIMG7_IRQHandler
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TIMG12_IRQHandler
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I2C0_IRQHandler
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I2C1_IRQHandler
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AES_IRQHandler
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RTC_IRQHandler
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DMA_IRQHandler
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
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ALIGN
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ENDIF
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END
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